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      Job Description:

      As part of the ESL architecture team, engineer will mainly focus on following areas, but not limited to:

      1、Architecture exploring for the complex SoC and high-speed subsystem include but not limited to memory, interconnection, ISP, GPU, CPU, and etc.

      2、Bring up the virtual platform and analysis the performance and power simulation result.

      3、Write the high quality SystemC/C++/TLM2 model for the memory, interconnection, and other high-speed subsystem.

      4、Work out the highly configurable work load model for the various components in various scenarios.

      5、Work out the SoC use case and performance goal in system level with help from product engineer.

      6、Assist design engineer to work out the ASIC micro-architecture.

      7、Co-work with verification engineer, design engineer, and software engineer to qualify and improve the quality of models.

      Job Requirements:

      1、 Degree in electrical engineering, computer engineering or related technical fields.

      2、 Good knowledge of C++/SystemC modeling.

      3、 Good knowledge on the Verilog and SystemVerilog.

      4、 A high-level of self-motivation and a proactive approach to solving problems.

      Solid knowledge in one of the following areas is a plus:

      1、 Strong experience of high level modeling or software development with C++.

      2、 experience of the ASIC design or verification.

      3、 Familiar with AMBA AXI/AHB/APB spec.

      4、 experience of GPU/VPU/DPU.

      5、 experience of PCIE/USB/Ethernet/UFS/eMMC.

      6、 Experience of low power design and power analysis.

      7、 Experience of complex SoC modeling.

      Job Description:

      1、Responsible for Front-End chip implementation work from RTL2Netlist, including SOC/IP level Synthesis/STA/Formality check/Lint/CDC/Quality check.

      2、Responsible for ASIC design methodology and flow development & optimization, interfacing with EDA vendors on technology.

      3、Support Lint/CDC check, SDC/UPF writing.

      4、Deliver constraints and closely co-work timing & power closure with P&R.

      Job Requirements:

      1、 Hand on experience of Synthesis/Formality/STA/LEC/SDC/UPF/Netlist quality check.

      2、 Familiar with front-end EDA tools and flows (DCG, PT, Conformal, Formality, Spyglass, GCA).

      3、 Familiar with unix/linux and scripts (tcl, perl, makefile etc.).

      4、 Experience in highspeed interface IP, high performance Core is a plus.

      5、 Experience in dft or physical design is a plus.

      6、 A high-level of self-motivation and a proactive approach to solving problems.

      Job Description:

      1、Responsible for Front-End chip implementation work from RTL2Netlist, including SOC/IP level Synthesis/STA/Formality check/Lint/CDC/Quality check.

      2、Responsible for ASIC design methodology and flow development & optimization, interfacing with EDA vendors on technology.

      3、Support Lint/CDC check, SDC/UPF writing.

      4、Deliver constraints and closely co-work timing & power closure with P&R.

      Job Requirements:

      1、 Hand on experience of Synthesis/Formality/STA/LEC/SDC/UPF/Netlist quality check.

      2、 Familiar with front-end EDA tools and flows (DCG, PT, Conformal, Formality, Spyglass, GCA).

      3、 Familiar with unix/linux and scripts (tcl, perl, makefile etc.).

      4、 Experience in highspeed interface IP, high performance Core is a plus.

      5、 Experience in dft or physical design is a plus.

      6、 A high-level of self-motivation and a proactive approach to solving problems.

      Job Description:

      1、Responsible for Front-End chip implementation work from RTL2Netlist, including SOC/IP level Synthesis/STA/Formality check/Lint/CDC/Quality check.

      2、Responsible for ASIC design methodology and flow development & optimization, interfacing with EDA vendors on technology.

      3、Support Lint/CDC check, SDC/UPF writing.

      4、Deliver constraints and closely co-work timing & power closure with P&R.

      Job Requirements:

      1、 Hand on experience of Synthesis/Formality/STA/LEC/SDC/UPF/Netlist quality check.

      2、 Familiar with front-end EDA tools and flows (DCG, PT, Conformal, Formality, Spyglass, GCA).

      3、 Familiar with unix/linux and scripts (tcl, perl, makefile etc.).

      4、 Experience in highspeed interface IP, high performance Core is a plus.

      5、 Experience in dft or physical design is a plus.

      6、 A high-level of self-motivation and a proactive approach to solving problems.

      Job Description:

      Lead or co-lead the team to achieve verification target of state-of-the-art ARM based SoC, or one of its sub-system. Be responsible for verification quality and schedule.

      1、Lead the verification process, decompose tasks for each team member.

      2、Create verifcation plan and review with architecture/design team.

      3、Create random constraint test bench based on the requirement.

      4、Create random test cases and direct test cases to achieve coverage goals.

      5、Work closely with architecture/design team to identify problems.

      6、Low-power verification.

      7、Performance verification.

      8、Finish verification tasks on time.

      1. Job Requirements:

      1、 Bachelor or above with more than 5 years’ work experience.

      2、 Proficient with System Verilog & UVM.

      3、 Expert in the use of Cadence/Synopsys verification tools.

      4、 Verification experience on automotive chip is a great plus.

      5、 CPU/GPU/ISP/DDR architecture knowledge is a great plus.

      6、 high speed interface protocol knowledge is a great plus: PCIe/USB3.1/Ethernet, etc.

      verification experience using Palladium/ZeBU is a great plus.

      scripting languages (Python, Perl, Makefile, …) is an additional plus.

      C and ARMv8.x assembly code programming skill is an additional plus.

      Good communication skills.

      Job Description:

      Lead or co-lead the team to achieve verification target of state-of-the-art ARM based SoC, or one of its sub-system. Be responsible for verification quality and schedule.

      1、Lead the verification process, decompose tasks for each team member.

      2、Create verifcation plan and review with architecture/design team.

      3、Create random constraint test bench based on the requirement.

      4、Create random test cases and direct test cases to achieve coverage goals.

      5、Work closely with architecture/design team to identify problems.

      6、Low-power verification.

      7、Performance verification.

      8、Finish verification tasks on time.

      1. Job Requirements:

      1、 Bachelor or above with more than 5 years’ work experience.

      2、 Proficient with System Verilog & UVM.

      3、 Expert in the use of Cadence/Synopsys verification tools.

      4、 Verification experience on automotive chip is a great plus.

      5、 CPU/GPU/ISP/DDR architecture knowledge is a great plus.

      6、 high speed interface protocol knowledge is a great plus: PCIe/USB3.1/Ethernet, etc.

      verification experience using Palladium/ZeBU is a great plus.

      scripting languages (Python, Perl, Makefile, …) is an additional plus.

      C and ARMv8.x assembly code programming skill is an additional plus.

      Good communication skills.

      Job Description:

      Lead or co-lead the team to achieve verification target of state-of-the-art ARM based SoC, or one of its sub-system. Be responsible for verification quality and schedule.

      1、Lead the verification process, decompose tasks for each team member.

      2、Create verifcation plan and review with architecture/design team.

      3、Create random constraint test bench based on the requirement.

      4、Create random test cases and direct test cases to achieve coverage goals.

      5、Work closely with architecture/design team to identify problems.

      6、Low-power verification.

      7、Performance verification.

      8、Finish verification tasks on time.

      1. Job Requirements:

      1、 Bachelor or above with more than 5 years’ work experience.

      2、 Proficient with System Verilog & UVM.

      3、 Expert in the use of Cadence/Synopsys verification tools.

      4、 Verification experience on automotive chip is a great plus.

      5、 CPU/GPU/ISP/DDR architecture knowledge is a great plus.

      6、 high speed interface protocol knowledge is a great plus: PCIe/USB3.1/Ethernet, etc.

      verification experience using Palladium/ZeBU is a great plus.

      scripting languages (Python, Perl, Makefile, …) is an additional plus.

      C and ARMv8.x assembly code programming skill is an additional plus.

      Good communication skills.

      Job Description:

      This position is for a digital-MCU design engineer to build next-gen automotive MCU chipsets.As part of the MCU design team, the design engineer will mainly focus on following areas, but not limited to:

      1、Prepare micro-architecture specification for IP or subsystem design.

      2、Provide detailed technical documentation with specifications, block diagrams, and requirements to stakeholders.

      3、RTL coding to verify against circuit implementation; Perform integration into MCUs.

      4、Module level Automotive functional safety related design and document.

      5、Maintain the 3rd party IP from vendor and verify functions by creating test cases.

      6、Module level synthesize with sdc/upf; support chip level synthesis as IP owner.

      7、Assist with chip bring up and perform silicon/FPGA functional/performance validation.

      8、Assist with automotive functional safety (ISO26262) certification.

      9、Define timing and power specifications and identify timing solutions.

      10、Assist with backend team on perform place-and-route and timing analysis of modules.

      Job Requirements:

      1、 Master’s degree with at least 5 years’ experience in digital design.

      2、 Proven track record for successful design of IC products in the past.

      3、 Good background in C, Verilog, SystemVerilog and verification methodology.

      4、 Knowledge and experience with Python/Tcl and Unix/Linux Makefile scripting strongly desired.

      5、 A high-level of self-motivation and a proactive approach to solving problems.

      6、 A high-level of self-motivation and a proactive approach to solving problems.

      7、 Familiar with the frontend ASIC design methodology/flow.

      Solid knowledge in one of the following areas is a plus:

      1、 Knowledge of ARM cortex M or cortex R's MCU or SOC architecture.

      2、 Knowledge of automotive function safety (ISO26262) design.

      3、 Knowledge of security design.

      4、 Knowledge of low power design.

      5、 Knowledge or design experience of CAN_FD/LIN/USB/Ethernet/UFS/eMMC/EFALSH Controller.

      Job Description:

      This position is for a digital-MCU design engineer to build next-gen automotive MCU chipsets.As part of the MCU design team, the design engineer will mainly focus on following areas, but not limited to:

      1、Prepare micro-architecture specification for IP or subsystem design.

      2、Provide detailed technical documentation with specifications, block diagrams, and requirements to stakeholders.

      3、RTL coding to verify against circuit implementation; Perform integration into MCUs.

      4、Module level Automotive functional safety related design and document.

      5、Maintain the 3rd party IP from vendor and verify functions by creating test cases.

      6、Module level synthesize with sdc/upf; support chip level synthesis as IP owner.

      7、Assist with chip bring up and perform silicon/FPGA functional/performance validation.

      8、Assist with automotive functional safety (ISO26262) certification.

      9、Define timing and power specifications and identify timing solutions.

      10、Assist with backend team on perform place-and-route and timing analysis of modules.

      Job Requirements:

      1、 Master’s degree with at least 5 years’ experience in digital design.

      2、 Proven track record for successful design of IC products in the past.

      3、 Good background in C, Verilog, SystemVerilog and verification methodology.

      4、 Knowledge and experience with Python/Tcl and Unix/Linux Makefile scripting strongly desired.

      5、 A high-level of self-motivation and a proactive approach to solving problems.

      6、 A high-level of self-motivation and a proactive approach to solving problems.

      7、 Familiar with the frontend ASIC design methodology/flow.

      Solid knowledge in one of the following areas is a plus:

      1、 Knowledge of ARM cortex M or cortex R's MCU or SOC architecture.

      2、 Knowledge of automotive function safety (ISO26262) design.

      3、 Knowledge of security design.

      4、 Knowledge of low power design.

      5、 Knowledge or design experience of CAN_FD/LIN/USB/Ethernet/UFS/eMMC/EFALSH Controller.

      Job Description:

      This position is for a digital-MCU design engineer to build next-gen automotive MCU chipsets.As part of the MCU design team, the design engineer will mainly focus on following areas, but not limited to:

      1、Prepare micro-architecture specification for IP or subsystem design.

      2、Provide detailed technical documentation with specifications, block diagrams, and requirements to stakeholders.

      3、RTL coding to verify against circuit implementation; Perform integration into MCUs.

      4、Module level Automotive functional safety related design and document.

      5、Maintain the 3rd party IP from vendor and verify functions by creating test cases.

      6、Module level synthesize with sdc/upf; support chip level synthesis as IP owner.

      7、Assist with chip bring up and perform silicon/FPGA functional/performance validation.

      8、Assist with automotive functional safety (ISO26262) certification.

      9、Define timing and power specifications and identify timing solutions.

      10、Assist with backend team on perform place-and-route and timing analysis of modules.

      Job Requirements:

      1、 Master’s degree with at least 5 years’ experience in digital design.

      2、 Proven track record for successful design of IC products in the past.

      3、 Good background in C, Verilog, SystemVerilog and verification methodology.

      4、 Knowledge and experience with Python/Tcl and Unix/Linux Makefile scripting strongly desired.

      5、 A high-level of self-motivation and a proactive approach to solving problems.

      6、 A high-level of self-motivation and a proactive approach to solving problems.

      7、 Familiar with the frontend ASIC design methodology/flow.

      Solid knowledge in one of the following areas is a plus:

      1、 Knowledge of ARM cortex M or cortex R's MCU or SOC architecture.

      2、 Knowledge of automotive function safety (ISO26262) design.

      3、 Knowledge of security design.

      4、 Knowledge of low power design.

      5、 Knowledge or design experience of CAN_FD/LIN/USB/Ethernet/UFS/eMMC/EFALSH Controller.

      Job Description:

      Lead or co-lead the verification team to finish latest ARM Cortex-M or Cortes-R based MCU verification, or subsystem level verification. Take charge of verification quality and schedule.

      1、1.Lead the verification process, decompose tasks for each team member.

      2、Create test plan and review with architecture/design team.

      3、Create random constraint test bench based on the requirement.

      4、Create random test cases and direct test cases to achieve coverage goals.

      5、Work closely with architecture/design team to identify problems.

      6、Low-power verification.

      7、Automotive function safety (ISO26262) verification.

      8、Performance verificatio.

      9、Finish verification tasks on time.

      Job Requirements:

      1、 Bachelor or above with 6~10+ years’ work experience.

      2、 Proficient with System Verilog & UVM.

      3、 Expert in the use of Cadence/Synopsys verification tools.

      4、 verification experience on automotive chip is a great plus.

      5、 verification experience on automotive chip is a great plus.

      6、 EFLASH Controller knowledge is a great plus.

      7、 Interface protocol knowledge is a great plus: USB3.1/Ethernet/CAN_FD/LIN, etc.

      8、 Automotive function safety (ISO26262) verification experience is a great plus.

      9、 verification experience using FPGA is a plus.

      10、scripting languages (Python, Perl, Makefile, …) is an additional plus.

      11、 C and ARMv7.x or ARMv8.x assembly code programming skill is an additional plus.

      12、 Good communication skills.

      Job Description:

      Lead or co-lead the verification team to finish latest ARM Cortex-M or Cortes-R based MCU verification, or subsystem level verification. Take charge of verification quality and schedule.

      1、1.Lead the verification process, decompose tasks for each team member.

      2、Create test plan and review with architecture/design team.

      3、Create random constraint test bench based on the requirement.

      4、Create random test cases and direct test cases to achieve coverage goals.

      5、Work closely with architecture/design team to identify problems.

      6、Low-power verification.

      7、Automotive function safety (ISO26262) verification.

      8、Performance verificatio.

      9、Finish verification tasks on time.

      Job Requirements:

      1、 Bachelor or above with 6~10+ years’ work experience.

      2、 Proficient with System Verilog & UVM.

      3、 Expert in the use of Cadence/Synopsys verification tools.

      4、 verification experience on automotive chip is a great plus.

      5、 verification experience on automotive chip is a great plus.

      6、 EFLASH Controller knowledge is a great plus.

      7、 Interface protocol knowledge is a great plus: USB3.1/Ethernet/CAN_FD/LIN, etc.

      8、 Automotive function safety (ISO26262) verification experience is a great plus.

      9、 verification experience using FPGA is a plus.

      10、scripting languages (Python, Perl, Makefile, …) is an additional plus.

      11、 C and ARMv7.x or ARMv8.x assembly code programming skill is an additional plus.

      12、 Good communication skills.

      Job Description:

      Lead or co-lead the verification team to finish latest ARM Cortex-M or Cortes-R based MCU verification, or subsystem level verification. Take charge of verification quality and schedule.

      1、1.Lead the verification process, decompose tasks for each team member.

      2、Create test plan and review with architecture/design team.

      3、Create random constraint test bench based on the requirement.

      4、Create random test cases and direct test cases to achieve coverage goals.

      5、Work closely with architecture/design team to identify problems.

      6、Low-power verification.

      7、Automotive function safety (ISO26262) verification.

      8、Performance verificatio.

      9、Finish verification tasks on time.

      Job Requirements:

      1、 Bachelor or above with 6~10+ years’ work experience.

      2、 Proficient with System Verilog & UVM.

      3、 Expert in the use of Cadence/Synopsys verification tools.

      4、 verification experience on automotive chip is a great plus.

      5、 verification experience on automotive chip is a great plus.

      6、 EFLASH Controller knowledge is a great plus.

      7、 Interface protocol knowledge is a great plus: USB3.1/Ethernet/CAN_FD/LIN, etc.

      8、 Automotive function safety (ISO26262) verification experience is a great plus.

      9、 verification experience using FPGA is a plus.

      10、scripting languages (Python, Perl, Makefile, …) is an additional plus.

      11、 C and ARMv7.x or ARMv8.x assembly code programming skill is an additional plus.

      12、 Good communication skills.

      Job Description:

      1、Work with an experienced design team to design analog block for automotive SOC or MCU.

      2、Responsible for analog design, simulation, layout supervision, tape out and silicon verification.

      3、Work closely with design validation and characterization team to support successful product release.

      4、Experience on GPIO, ADC, DAC, Regulator(DCDC or LDO) design skill is a plus.

      5、Candidates must be self-motivated, driven and hard workin.

      Job Requirements:

      1、 Integrated circuit/ electronic engineering major, master degree or above.

      2、 2-3yr direct experience in analog IC design.

      3、 experience or related course work in the following fields.

      4、 Deep knowledge of analog circuit design.

      5、 Power-Management design and Ultra-Low-Power Analog Design.

      6、 Good communication skill is required.

      7、 Self-driven and proactive.

      8、 Good English communication skill, good team work.

      Job Description:

      1、Work with an experienced design team to design analog block for automotive SOC or MCU.

      2、Responsible for analog design, simulation, layout supervision, tape out and silicon verification.

      3、Work closely with design validation and characterization team to support successful product release.

      4、Experience on GPIO, ADC, DAC, Regulator(DCDC or LDO) design skill is a plus.

      5、Candidates must be self-motivated, driven and hard workin.

      Job Requirements:

      1、 Integrated circuit/ electronic engineering major, master degree or above.

      2、 2-3yr direct experience in analog IC design.

      3、 experience or related course work in the following fields.

      4、 Deep knowledge of analog circuit design.

      5、 Power-Management design and Ultra-Low-Power Analog Design.

      6、 Good communication skill is required.

      7、 Self-driven and proactive.

      8、 Good English communication skill, good team work.

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